Some control devices such as a safety interlock or the like are installed in a nuclear plant. The safety interlock carries out emergency shut down of the nuclear reactor at the time of abnormalities, or starts automatically engineered safety systems such as an emergency core cooling system or the like.
For example, the emergency core cooling system in a boiling water reactor of the electric power plant can be started automatically, or can also be started by the manual operation of a plant operator, if the water level of a nuclear reactor falls abnormally or the pressure of a containment vessel rises abnormally.
Boolean value such as TRUE or FALSE are made to correspond to arbitrary process signals to perform logical judgment for the pump starting of the emergency core cooling system.
Conventionally such logic realized by hardware such as comparator, relay and timer. Recently such logic realized by programmable controller (PLC; Programmable Logic Device) using CPU with development of computer technology.
It is known Operating System (OS) designed for such PLC used for the safety interlock of a nuclear power generation plant, having a function of input/output of a process signal, periodic execution of program, execution mode of communicative management, and a self-diagnosis of under initialization and execution (for example, non-patent literature 1).
On the other hand, some trial also conducted to realize such logic by semiconductor device such as FPGA (Field Programmable Gate Array) (for example, patent documents 1-4).
According to the FPGA, vendor of the safety interlock can be constructed logic in their discretion, without depending on the vendor of a semiconductor. Further, logic change is comparatively easy if the FPGA is used SRAM type or flash type.
FPGA can perform operation of the Boolean value on the hardware gate directly. That FPGA is unnecessary loading of an operation command and decoding like in PLC, and also unnecessary an OS. Further, the directly wiring among the FPGA realizes high efficiency in accessing the Boolean value as an operating object, compare with PLC loading the Boolean value from RAM or storing them to RAM.
Thus the FPGA performs processing by the assigned dedicated circuit, and then processing of the Boolean value can be efficiently performed rather than CPU.